Light receiving array, method of manufacturing the array, and optical encoder using the array

ABSTRACT

The present invention has an object to provide a photoreceptor array with an excellent device property and no short fault between adjacent photoreceptors and to provide a method of manufacturing such the photoreceptor array with a high yield. On a transparent substrate ( 31 ), a transparent electrode ( 32 ) and a p-type amorphous silicon layer ( 33 ) are formed. An insulating layer ( 41 ) is deposited thereon to form a trench ( 42 ). In the trench ( 42 ), an i-type amorphous silicon layer ( 34 ), an n-type amorphous silicon layer ( 35 ) and an n-side electrode ( 36 ) are buried in turn to form the photoreceptor array.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a photoreceptor array applicableto an optical encoder and method of manufacturing the same.

[0003] 2. Description of the Related Art

[0004] A small optical encoder may include a sensor head that employs anarray of photoreceptors also serving as index gratings. Thisphotoreceptor array can provide four-phase displacement signals if fourphotoreceptors are arrayed in a set with a pitch of (2n−1)λ/4 where λ isa pitch in scale gratings and n is a positive integer.

[0005] Such the photoreceptor array can be produced from photodiodesthat are fabricated in a single crystal silicon substrate. In this case,however, the smaller the pitch in the array of photoreceptors the largerthe crosstalk between photoreceptors adjoining with each other via thesubstrate. In order to produce a photoreceptor array without such thecrosstalk, it is desirable to form photodiodes using amorphous siliconon an insulating substrate such that each photodiode is isolated fromothers. An array of pin photodiodes can be obtained when amorphoussilicon of p-, i- and n-types are layered on the insulating substrateand subsequently etched.

[0006] If an interval between PDs is as fine as 4 μm or below, themethod of manufacturing a PD (photodiode) array using the etching ofamorphous silicon layers makes an aspect ratio larger, remains etchingresidues easily and causes short faults between adjacent PDs. A dryetching such as a plasma etching may be employed for fine etching ofamorphous silicon. This etching process often imparts damages on PDs anddiffuses impurities from sidewalls into PDs. For these reasons, theconventional method can not achieve an excellent PD property and highyield.

SUMMARY OF THE INVENTION

[0007] The present invention has an object to provide a photoreceptorarray with an excellent device property and no short fault betweenadjacent photoreceptors and to provide a method of manufacturing suchthe photoreceptor array with a high yield.

[0008] The present invention is provided with a photoreceptor array,which comprises a substrate; an insulating layer formed on thesubstrate, the insulating layer having a plurality of trenches formedtherein for burying devices; a plurality of photoreceptors formed fromsemiconductor layers buried in each of the trenches in the insulatinglayer; and an output signal line formed on the plurality ofphotoreceptors via an interlayer insulator.

[0009] The present invention is also provided with a method ofmanufacturing a photoreceptor array, which comprises the steps ofproviding a substrate; forming an insulating layer on the substrate;forming a plurality of trenches in the insulating layer; forming aplurality of photoreceptors from semiconductor layers buried in each ofthe trenches in the insulating layer; and forming an output signal lineon the plurality of photoreceptors via an interlayer insulator.

[0010] According to the present invention, the photoreceptor array isformed from the semiconductor layers buried in the trenches in theinsulating layer on the substrate. Therefore, adjacent photoreceptors inthe array can be isolated from each other reliably with no problem tocause a short fault therebetween. Accordingly, a fine pitch array ofphotoreceptors can be obtained with an excellent device property andhigh yield.

[0011] In an embodiment, the substrate may be composed of a transparentsubstrate. In addition, the photoreceptor array may further comprise atransparent electrode that is formed between the transparent substrateand the insulating layer and is operative as a lower electrode common tothe plurality of photoreceptors. In this photoreceptor array, the backsurface of the substrate is employed to receive a light. If thephotoreceptors have upper electrodes, and each of which is composed of atransparent electrode, the upper electrodes may be employed to receive alight from above. In this photoreceptor array, the substrate is notrequired transparent and the lower electrode may be a metallicelectrode.

[0012] Preferably, the plurality of photoreceptors may have upperelectrodes, each of which may be self-aligned with and buried in thetrench. This can prevent short faults between photoreceptors in contrastto the case where the upper electrodes are etched for pattern formation.

[0013] In an embodiment, the photoreceptor may be a pin or pn photodiode(PD). In this case, p-type layers in the plurality of PDs may be formedas a single and common p-type layer continuously on the common lowerelectrode. An i-type layer and an n-type layer are buried and formed ineach trench.

[0014] The present invention is further provided with an opticalencoder, which comprises a scale having optical gratings formed thereonalong a measurement axis; and a sensor head including a photoreceptorarray for detecting displacements of the scale to provide a plurality ofdisplacement signals with different phases. The photoreceptor arrayincludes a substrate; a lower electrode formed on the substrate; aninsulating layer formed on the substrate, the insulating layer having aplurality of trenches formed therein for burying devices; a plurality ofphotoreceptors formed from semiconductor layers buried in each of thetrenches in the insulating layer, the plurality of photoreceptors eachhaving an upper electrode formed thereon; and an output signal lineformed on the plurality of photoreceptors via an interlayer insulator.

[0015] According to the present invention, a high performance opticalencoder with a fine scale pitch can be obtained.

[0016] Other features and advantages of the invention will be apparentfrom the following description of the preferred embodiments thereof.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be more fully understood from thefollowing detailed description with reference to the accompanyingdrawings in which:

[0018]FIG. 1 shows an arrangement of an optical encoder of reflectiontype that employs a photoreceptor array of the present invention;

[0019]FIG. 2 shows an arrangement of an optical encoder of transmissiontype that employs a photoreceptor array of the present invention;

[0020]FIG. 3A is a top view showing an arrangement of a photoreceptorarray according to an embodiment of the present invention;

[0021]FIG. 3B is a cross-sectional view taken along an A-A′ line in FIG.3A;

[0022] FIGS. 4-14 are cross-sectional views showing process steps ofmanufacturing the photoreceptor array; and

[0023]FIG. 15 is a cross-sectional view of another photoreceptor array.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Preferred embodiments of the present invention will be describedbelow with reference to the drawings.

[0025]FIGS. 1 and 2 show arrangements of optical encoders that employ aphotoreceptor array of the present invention. FIG. 1 shows a reflectiveoptical encoder and FIG. 2 a transmissible optical encoder. The opticalencoders both comprise a scale 1 having optical gratings 11 formedthereon with a certain pitch of λ along a measurement axis x and asensor head 2 relatively movable and opposite to the scale 1 for readingthe optical gratings.

[0026] The sensor head 2 includes a light source such as an LED 21,index gratings 22 for modulating a light output from the source toirradiate the scale 1, and a photoreceptor array 3 for receiving a lightfrom the scale 1. The photoreceptor array 3 includes pin (or pn)photodiodes (PD) formed from amorphous silicon and arrayed on atransparent substrate 31. The PDs are formed on a surface of thetransparent substrate 31 opposite to the surface that faces to the scale1. Thus, the photoreceptor array 3 detects a light that enters throughthe transparent substrate 31.

[0027] FIGS. 3A-3B are a top view showing an embodied arrangement of thephotoreceptor array 3 and a cross-sectional view thereof taken along anA-A′ line. The transparent substrate 31 is composed of a glasssubstrate, for example. Formed on the transparent substrate 31 is atransparent electrode 32 that is employed as a lower electrode (p-sideelectrode) common to the photoreceptor array 3. Formed on thetransparent electrode 32 is a p-type amorphous silicon layer(hereinafter simply referred to as a “p-type layer”) 33 that is employedas an anode layer common to the photoreceptor array 3. The transparentelectrode 32 comprises a film of transparent conductor selected fromITO, SnO₂, ZnO and the like.

[0028] An insulating layer 41 is formed on the p-type layer 33 above thesubstrate. The insulating layer 41 has narrow long rectangular trenches42 formed therein with a certain pitch of 3λ/4, for example, where λ isa scale pitch. Each trench 42 is employed to bury a PD. A part of the PDactually buried in the trench 42 includes an i-type amorphous siliconlayer (hereinafter simply referred to as an “i-type layer”) 34. The partalso includes an n-type amorphous silicon layer (hereinafter simplyreferred to as an “In-type layer”) 35 as a cathode layer that islaminated on the i-type layer 34, and an upper electrode (n-sideelectrode) 36 that contacts the n-type layer 35. Thus, each PD isself-aligned with the trench 42, from a photoelectric conversion layerto an upper electrode, and is buried and formed in the trench 42.

[0029] An interlayer insulator 51 is formed on the insulating layer 41that includes the PDs buried therein. Output signal lines 52 are formedon the interlayer insulator 51 and are connected to the n-side electrode36 in each PD. Four signal lines 52 are provided to obtain four-phaseoutputs with A-, BB-, AB- and B-phases as shown in FIG. 3A. Theyrespectively contact the n-side electrode 36 in the corresponding PD viacontact holes 54.

[0030] Process steps of manufacturing the photoreceptor array 3 will bedescribed using cross sections of FIGS. 4-14 corresponding to the crosssection of FIG. 3B. First, as shown in FIG. 4, the transparent electrode32 is formed over the whole surface of the transparent substrate 31 andthe p-type layer 33 is then formed over the transparent electrode 32.Subsequently, the insulating layer 41 is deposited thereon as shown inFIG. 5. The insulating layer 41 has a specific laminated structure witha thick film of silicon oxide (SiO₂) 41 a formed by CVD and a thin filmof silicon nitride (Si₃N₄) 41 b formed by plasma CVD.

[0031] Next, the trenches 42 are formed in the insulating layer 41 asshown in FIG. 6. Specifically, a resist pattern is formed bylithography, then the silicon nitride 41 b is etched by RIE, and thesilicon oxide 41 a is etched by RIE using a different gas. In this case,if a conditioned large selective etching ratio to the silicon nitride isemployed when the silicon oxide 41 a is etched, the silicon nitride 41 bserves as an etching mask. As a result, the thick silicon oxide 41 a canbe etched to form the trench 42 with vertical sidewalls.

[0032] Thereafter, the i-type layer 34 is deposited thereon as shown inFIG. 7. Then, the i-type layer 34 is subjected to planarization by CMP(Chemical Mechanical Polishing) to be buried in the trench 42 as shownin FIG. 8. Further, the i-type layer 34 is subjected to a recess etchingby a dry or wet etching to make a certain recessed step above the i-typelayer 34 that is buried in the trench 42 as shown in FIG. 9.

[0033] Subsequently, the n-type layer 35 is deposited thereon as shownin FIG. 10. The n-type layer 35 is then subjected to CMP planarizationand recess etching to obtain such the n-type layer 35 that is buried inthe trench 42 up to a certain recessed step as shown in FIG. 11.

[0034] Then, as shown in FIG. 12, the n-side electrode (metallicelectrode) 36 is buried in the trench 42 and formed to contact theadjacent n-type layers 35. The process of burying the n-side electrode36 is also performed through deposition and planarization of a metallicfilm.

[0035] Next, the interlayer insulator 51 is deposited by CVD as shown inFIG. 13. In this embodiment, to form contacts of the signal lines to PDsby the dual damascene technology, the interlayer insulator 51 has astacked structure consisting of layers of silicon oxide 51 a, siliconnitride 51 b and silicon oxide 51 c.

[0036] For the stacked interlayer insulator 51, as shown in FIG. 14, agroove 53 for burying a line and a contact hole 54 are formed. A metalis buried in the groove 53 and contact hole 54 to form the output signalline 52 as shown in FIG. 3B. The output signal line 52 may be coveredwith a passivating film, if required.

[0037] As described above, according to the present embodiment, thephotoreceptor array can be produced from amorphous silicon while each ofphotoreceptors is reliably isolated from others. Only the recess etchingis employed to slightly remove the surface of the amorphous siliconafter it is buried in the trench. A wet etching can be employed as therecess etching to reduce damages imparting on the amorphous silicon.Thus, a fine pitch array of photoreceptors can be produced with anexcellent property that includes no crosstalk, for example.

[0038] It is particularly important in the present embodiment that apart of a photoreceptor, from an photoelectric conversion layer to then-type layer 35 and n-side electrode 36 for providing output signalswith different phases, is buried in the trench 42 to reliably isolatefrom other photoreceptors. This structure can prevent crosstalk thatwill otherwise occur among output signals with different phases.

[0039] Such the photoreceptor array can be employed to configure anoptical encoder with a high performance. As shown in FIGS. 1 and 2, thephotoreceptor array 3 in the sensor head 2 is not opposed directly tothe scale 1 and accordingly has no problem to be damaged andcontaminated from contacting the scale 1.

[0040] In the above embodiment, the substrate is composed of atransparent substrate and the photoreceptor array is configured toreceive a light through the substrate. Instead the photoreceptor arraymay also be configured to receive a light from above at photoreceptorsthat are buried in trenches formed in an insulating layer.

[0041]FIG. 15 shows a cross-sectional structure, corresponding to FIG.3B, of a photoreceptor array 3 a according to such the embodiment. Thesubstrate 31 a may not be a transparent substrate in contrast to FIG.3B. A metallic electrode is employed as a lower electrode 32 a common toPDs. On the other hand, a transparent electrode is employed as an upperelectrode 36 a of each PD. Process steps are the same as those in theprevious embodiment.

[0042] In this embodiment, a signal line to be connected to each upperelectrode 36 a is omitted in FIG. 15. Though, it can contact an edge ofthe upper electrode 36 a and be drawn therefrom without covering thesurface of the PD as long as possible. The photoreceptor array in thisembodiment is similarly applicable to an optical encoder but thesurface, on which PDs are formed, must face to the scale in contrast toFIGS. 1 and 2.

[0043] The present invention is not intended to limit to the aboveembodiments. For example, other photoelectrically convertiblesemiconductors such as ZnSe and CdSe may also be employed while theamorphous silicon is used for the semiconductor layers in the aboveembodiments.

[0044] In addition, unlike the p-type layer in the above embodimentsthat is commonly used for every PD, a p-type layer may be independentlyburied in each trench. Furthermore, the order of stacking p-, i-andn-layers on the substrate is employed in the above embodiments to form aPD, though it can be reversed. In this case, output signal lines are tobe formed beneath the insulating layer 41.

[0045] Planarization may be performed through the use of etching such asdry etching and wet etching while it is executed by CMP in the aboveembodiments. In FIG. 1 a light beam is introduced obliquely into thescale 1, though a reflective encoder of vertical entry type can beconfigured if the PD substrate 31 also serves as the index gratings 22.

[0046] As obvious from the forgoing, according to the present invention,each photoreceptor in an array of photoreceptors is produced by buryingsemiconductor layers in a trench that is formed in an insulating layeron a substrate. Therefore, adjacent photoreceptors in the array arereliably isolated from each other. Accordingly, an array ofphotoreceptors can be produced with no problem to cause a short fault,an excellent device property, a fine pitch and a high yield.

[0047] Having described the embodiments consistent with the invention,other embodiments and variations consistent with the invention will beapparent to those skilled in the art. Therefore, the invention shouldnot be viewed as limited to the disclosed embodiments but rather shouldbe viewed as limited only by the spirit and scope of the appendedclaims.

What is claimed is:
 1. A photoreceptor array, comprising: a substrate;an insulating layer formed on said substrate, said insulating layerhaving a plurality of trenches formed therein for burying devices; aplurality of photoreceptors formed from semiconductor layers buried ineach of said trenches in said insulating layer; and an output signalline formed on said plurality of photoreceptors via an interlayerinsulator.
 2. The photoreceptor array according to claim 1 wherein saidsubstrate is composed of a transparent substrate, said array furthercomprising a transparent electrode formed between said transparentsubstrate and said insulating layer and operative as a lower electrodecommon to said plurality of photoreceptors, and wherein the back surfaceof said substrate is employed to receive a light.
 3. The photoreceptorarray according to claim 1 , wherein said plurality of photoreceptorshas upper electrodes, each of which is composed of a transparentelectrode, and wherein said upper electrodes are employed to receive alight from above.
 4. The photoreceptor array according to claim 3 ,wherein said plurality of photoreceptors has upper electrodes, each ofwhich is self-aligned with and buried in said trench.
 5. Thephotoreceptor array according to claim 1 , wherein said plurality ofphotoreceptors comprises a plurality of photodiodes.
 6. Thephotoreceptor array according to claim 5 , wherein said plurality ofphotodiodes has a p-type layer and an n-type layer, said p-type layerformed continuously on a lower electrode formed continuously over saidsubstrate, and said n-type layer buried and formed in each trench.
 7. Anoptical encoder, comprising: a scale having optical gratings formedthereon along a measurement axis; and a sensor head including aphotoreceptor array for detecting displacements of said scale to providea plurality of displacement signals with different phases, saidphotoreceptor array including a substrate; a lower electrode formed onsaid substrate; an insulating layer formed on said substrate, saidinsulating layer having a plurality of trenches formed therein forburying devices; a plurality of photoreceptors formed from semiconductorlayers buried in each of said trenches in said insulating layer, saidplurality of photoreceptors each having an upper electrode formedthereon; and an output signal line formed on said plurality ofphotoreceptors via an interlayer insulator.
 8. The optical encoderaccording to claim 7 , wherein said substrate is composed of atransparent substrate and said lower electrode is composed of atransparent electrode, and wherein the back surface of said substrate isemployed in said photoreceptor array to receive a light therethrough. 9.The optical encoder according to claim 7 , wherein said upper electrodeis composed of a transparent electrode, and wherein said upper electrodeis employed in said photoreceptor array to receive a light therethrough.10. A method of manufacturing a photoreceptor array, comprising thesteps of: providing a substrate; forming an insulating layer on saidsubstrate; forming a plurality of trenches in said insulating layer;forming a plurality of photoreceptors from semiconductor layers buriedin each of said trenches in said insulating layer; and forming an outputsignal line on said plurality of photoreceptors via an interlayerinsulator.
 11. The method according to claim 10 , further comprising thestep of forming a lower electrode common to said plurality ofphotoreceptors prior to forming said insulating layer on said substrate.12. The method according to claim 10 , further comprising the steps of:forming a lower electrode common to said plurality of photoreceptors;and forming a p-type semiconductor layer operative as an anode layercommon to said plurality of photoreceptors on said lower electrode priorto forming said insulating layer on said substrate.
 13. The methodaccording to claim 12 , wherein said step of forming the plurality ofphotoreceptors includes burying an i-type semiconductor layer and ann-type semiconductor layer in turn in said trenches.
 14. The methodaccording to claim 12 , wherein said step of forming the plurality ofphotoreceptors includes burying an i-type semiconductor layer, an n-typesemiconductor layer and an upper electrode in turn in said trenches.